This is a cache of https://discuss.96boards.org/t/getting-cif-isp-pic-size-error-with-y8-grey-input-to-isp/10500. It is a snapshot of the page at 2021-04-07T00:52:30.200+0000.
Getting CIF_ISP_PIC_SIZE_ERROR with Y8 (GREY) input to ISP - Rock960 - 96Boards Forum

Getting CIF_ISP_PIC_SIZE_ERROR with Y8 (GREY) input to ISP

Board based on the Rockchip rk3399 - ARM Cortex-A72 Dual-core up to 1.8GHz + Cortex A53 Quad-core up to 1.4GHz

Hi ,
I am getting contineous “rkisp1: CIF_ISP_PIC_SIZE_ERROR (0x00000001)” MIPI mis error when i pass Y8 data to ISP. i Have configured source and sink with Y8 properly .

after so much of above error message , getting ISP frame complete finally. that captured frame also not proper.

Is something i am missing at ISP IN/OUT configuration ? or i need to look into clock configuration ? anyadvice would be helpfull.

Below are the source , sink configurations,
media-ctl -d /dev/media0 --set-v4l2 ‘“rkisp1-isp-subdev”:2[fmt:Y8/640x480 field:none]’
media-ctl -d /dev/media0 --set-v4l2 ‘“rkisp1-isp-subdev”:0[fmt:Y8/640x480 field:none]’
media-ctl -d /dev/media0 --set-v4l2 ‘“sensor_XXX 2-0042”:0[fmt:Y8/640x480 field:none]’
media-ctl -d /dev/media0 -l ‘“sensor_XXX 2-0042”:0->“rockchip-sy-mipi-dphy”:0[1]’

static const struct ispsd_in_fmt rkisp1_isp_input_formats[] = {
{
.mbus_code = MEDIA_BUS_FMT_Y8_1X8,
.fmt_type = FMT_YUV,
.mipi_dt = CIF_CSI2_DT_RAW8,
.yuv_seq = CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO,
.bus_width = 8,

static const struct ispsd_out_fmt rkisp1_isp_output_formats[] = {
{
.mbus_code = MEDIA_BUS_FMT_Y8_1X8,
.fmt_type = FMT_YUV,

Kindly advice , did i need to take care any other configuration ?
our sensor is streaming out Y8 (which we confirmed with other platforms)

Thanks in advance