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PCIe link failure with PCIe device card - Rock960 - 96Boards Forum

PCIe link failure with PCIe device card

Products Support Rock960
#1

Hi,
We insert a PCIe device card into M.2 slot, PCIe link failed with log “PCIe link training gen1 timeout!”, “pcie failed with error -110”.
But when i insert a M.2 SSD card, PCIe link successfully.
Is there any difference about PCIe link between M.2 SSD card and an regular/ordinary PCIe device card?
I use a PCIe to M.2 adapter card, this adapter card has been tested OK.
PS: I have tested my PCIe device card on rk3399pro, PCIe link successfully.

#2

There are two type of m.2 ssd:

  • SATA: these use the sata pins on the m.2 slot and have absolutely nothing to do with pcie lanes
  • NVME: these are actually over pcie lanes

So if you have a sata m.2 ssd, it will work even if the pcie link doesn’t work.

Also you might also want to check the PCB revision for your rock960, we’ve had pcie improvements over the last couple of revisions:

#5

@ric96 I do insert a NVME SSD because the device is listed using lspci and the link status is 2.5GT/s x4.
The PCB revision is v1.2.
I’ve noticed that in revision 1.3, “add a dedicated PCIE power, some M.2 devices requires high peak current at power on”, does this affect pcie link negotiation?

#6

@ric96 One additonal infomation: we checked the failed card’s LTSSM register, that is at 0x0 (IDLE) state. It seems the training not started, so should we change some configuration before or in the process of power on?

#7

I had the same ‘-110’ error code with a PCIe M.2 to SATA bridge card on NanoPC-T4 (RK3399) kernels 4.4.x from FriendlyARM and from Rockchip, but the problem disappeared with mainline 5.8.5. Details below, cross-posing from http://www.friendlyarm.com/Forum/viewtopic.php?f=61&t=3246#p9158 in case that forum goes down.

Card:
M.2 B+M Key 22x42 PCIe To 2 Port SATA III RAID Adapter Card - SI-ADA40126

Chipset ASMedia 106x

Update: This PCIe M.2 to SATA board works in mainline kernel 5.8.5.

$ uname -a
Linux hume 5.8.5-g9ece50d8a470-dirty #5 SMP Sat Aug 29 12:18:03 EDT 2020 aarch64 GNU/Linux
$ lspci
00:00.0 PCI bridge: Fuzhou Rockchip Electronics Co., Ltd RK3399 PCI Express Root Port
01:00.0 SATA controller: ASMedia Technology Inc. ASM1062 Serial ATA Controller (rev 02)[/code]

[code]$ dmesg | grep -i pcie       
[    2.320413] rockchip-pcie f8000000.pcie: GPIO lookup for consumer ep
[    2.320484] rockchip-pcie f8000000.pcie: using device tree for GPIO lookup
[    2.320539] of_get_named_gpiod_flags: parsed 'ep-gpios' property of node '/pcie@f8000000[0]' - status (0)
[    2.321036] rockchip-pcie f8000000.pcie: no vpcie12v regulator found
[    2.942771] rockchip-pcie f8000000.pcie: GPIO lookup for consumer ep
[    2.942775] rockchip-pcie f8000000.pcie: using device tree for GPIO lookup
[    2.942792] of_get_named_gpiod_flags: parsed 'ep-gpios' property of node '/pcie@f8000000[0]' - status (0)
[    2.942932] rockchip-pcie f8000000.pcie: no vpcie12v regulator found
[    3.050086] rockchip-pcie f8000000.pcie: host bridge /pcie@f8000000 ranges:
[    3.051078] rockchip-pcie f8000000.pcie:      MEM 0x00fa000000..0x00fbdfffff -> 0x00fa000000
[    3.051820] rockchip-pcie f8000000.pcie:       IO 0x00fbe00000..0x00fbefffff -> 0x00fbe00000
[    3.052733] rockchip-pcie f8000000.pcie: PCI host bridge to bus 0000:00
[    3.078088] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
[    3.078755] pcieport 0000:00:00.0: PME: Signaling with IRQ 240
[    3.079405] pcieport 0000:00:00.0: AER: enabled with IRQ 240

For completely unrelated reason (mmc partitions), I had to add a patch to the mainline kernel. Attaching here. Also, copied tools to pack .img image from kernel-rockchip repo from FriendlyARM.

Device tree from mainline, but rename the binary, because bootloader looks for a particular name in the resource.img image.

Tag: v5.8.5 commit 9ece50d8a470ca7235ffd6ac0f9c5f0f201fe2c8

  git clone -b nanopi4-linux-v4.4.y https://github.com/friendlyarm/kernel-rockchip kernel-rockchip
  git clone -b v5.8.5 git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git mainline
 cd mainline
 tar xvf nanopc-t4-patch-and-config-for-mainline-5.8.5.tar.gz
 patch -p1 < 0001-block-add-Nano-PC4-Rockchip-partition-scheme.patch 
 cp ../kernel-rockchip/{logo.bmp,logo_kernel.bmp,scripts/mkkrnlimg,scripts/resource_tool}
mkkrnlimg ./arch/arm64/boot/Image ./kernel.img
cp arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dtb arch/arm64/boot/dts/rockchip/rk3399-nanopi4-rev00.dtb
resource_tool --dtbname ./arch/arm64/boot/dts/rockchip/rk33*-nanopi*-rev*.dtb logo.bmp logo_kernel.bmp

Patch: