- Sort Score
- Result 10 results
- Languages All
- Labels All
Results 31 - 40 of 75 for fpga (0.46 sec)
-
Capturing the free running data over csi2 line ...
It is an FPGA which generates color bar pattern...like we have two boards, one is fpga board connected to SDSOM carrier...discuss.96boards.org/t/capturing-the-free-runni... CacheRegistered: Fri Sep 27 13:41:28 GMT 2024 - Last Modified: Tue Dec 15 10:15:33 GMT 2020 - 32.7K bytes - Viewed (0) -
Device with 4 Displays and 4 Cameras - General ...
the FPGA guys have some nice IP for you:...and I’m not sure if using this FPGA IP solution will help us in...discuss.96boards.org/t/device-with-4-displays-a... CacheRegistered: Fri Sep 27 09:25:15 GMT 2024 - Last Modified: Wed Sep 19 20:16:43 GMT 2018 - 28.4K bytes - Viewed (0) -
PCIe connection on ultra96 - Ultra96 - 96Boards...
com/product/fpga-drive-fmc-dual/ Bryan Copyright...discuss.96boards.org/t/pcie-connection-on-ultra... CacheRegistered: Fri Sep 27 12:29:19 GMT 2024 - Last Modified: Fri Dec 27 19:37:09 GMT 2019 - 13.2K bytes - Viewed (0) -
No Ouput on serial console with ultra96v2 - 96b...
elf --fpga images/linux/system.bit --u-boot...discuss.96boards.org/t/no-ouput-on-serial-conso... CacheRegistered: Fri Sep 27 14:20:48 GMT 2024 - Last Modified: Mon May 02 21:23:19 GMT 2022 - 13.4K bytes - Viewed (0) -
Looking for the best (but also simplest) way to...
to use block RAM in the PL (FPGA fabric). The Vivado hw platform...discuss.96boards.org/t/looking-for-the-best-but... CacheRegistered: Fri Sep 27 01:30:11 GMT 2024 - Last Modified: Tue Apr 20 01:39:08 GMT 2021 - 19.2K bytes - Viewed (0) -
Using Grove Sensor Mezzanine Uart connection wi...
the appropriate pins on the fpga. Copyright © 2024 Linaro Limited...discuss.96boards.org/t/using-grove-sensor-mezza... CacheRegistered: Fri Sep 27 11:33:46 GMT 2024 - Last Modified: Fri Jul 12 09:45:24 GMT 2019 - 14.3K bytes - Viewed (0) -
Next generation Ultra96 with higher-end Zynq Ul...
higher-end Zynq Ultrascale+ FPGAs that have PL with tranceivers...higher end Zynq Ultrascale+ FPGA so that we can seamlessly move...discuss.96boards.org/t/next-generation-ultra96-... CacheRegistered: Fri Sep 27 13:19:20 GMT 2024 - Last Modified: Sat Jul 04 08:09:21 GMT 2020 - 20.7K bytes - Viewed (0) -
Once and for all: WiFi on the Ultra96-v2 in a c...
need to be able to add our own FPGA design in the build, so we need...discuss.96boards.org/t/once-and-for-all-wifi-on... CacheRegistered: Fri Sep 27 01:28:33 GMT 2024 - Last Modified: Fri Nov 12 14:49:54 GMT 2021 - 14.1K bytes - Viewed (0) -
Latest Mezzanine Support topics - 96Boards Forum
2023 Interrupt on the FPGA 0 1409 January 25, 2022 Need...discuss.96boards.org/c/products/mezzanine/17 CacheRegistered: Fri Sep 27 00:08:33 GMT 2024 - 62.4K bytes - Viewed (0) -
Trouble connecting Ultra96 to tty port - Ultra9...
I am able to program the FPGA, but running the software program...discuss.96boards.org/t/trouble-connecting-ultra... CacheRegistered: Fri Sep 27 11:15:08 GMT 2024 - Last Modified: Fri May 24 10:58:14 GMT 2019 - 15.4K bytes - Viewed (0)