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Results 21 - 30 of 32 for fpga (0.62 sec)

  1. Training and Implementing a BNN Using Pynq - 96...

    implement an accelerated AI/ML on an FPGA without writing a line of HDL!...
    www.96boards.org/projects/bnn-using-pynq/ Cache
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    Registered: Tue Jul 01 00:45:40 GMT 2025
    - Last Modified: Thu Jun 19 11:50:13 GMT 2025
    - 16.3K bytes
    - Viewed (0)

  2. Getting Started with the Ultra96 - 96Boards

    means that the bistream for the FPGA portion of Ultra96 has successfully...means that the bistream for the FPGA portion of Ultra96 has successfully...
    www.96boards.org/documentation/consumer/ultra96... Cache
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    Registered: Mon Jun 30 02:21:06 GMT 2025
    - Last Modified: Thu Jun 19 11:50:03 GMT 2025
    - 22K bytes
    - Viewed (0)

  3. Getting Started with the Ultra96-V2 - 96Boards

    means that the bistream for the FPGA portion of Ultra96v2 has successfully...means that the bistream for the FPGA portion of Ultra96 has successfully...
    www.96boards.org/documentation/consumer/ultra96... Cache
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    Registered: Mon Jun 30 02:24:09 GMT 2025
    - Last Modified: Thu Jun 19 11:50:04 GMT 2025
    - 22.8K bytes
    - Viewed (0)

  4. The Autonomous Robot Challenge - Arm 2018 - 96B...

    UltraScale+ MPSoC (that’s an FPGA dev board with some real power!)....
    www.96boards.org/go/2018-arm-contest/ Cache
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    Registered: Mon Jun 30 03:21:06 GMT 2025
    - Last Modified: Thu Jun 19 11:50:09 GMT 2025
    - 15.2K bytes
    - Viewed (0)

  5. Consumer Edition Documentation - 96Boards

    based on the Intel Cyclone V SoC FPGA Documentation Ultra96 Board...
    www.96boards.org/documentation/consumer/ Cache
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    Registered: Tue Jul 01 00:15:09 GMT 2025
    - Last Modified: Thu Jun 19 11:50:01 GMT 2025
    - 25.7K bytes
    - Viewed (1)

  6. All 96Boards - 96Boards

    Shiratech FPGA Mezzanine Introducing the Shiratech FPGA Mezzanine,...
    www.96boards.org/products/ Cache
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    Registered: Tue Jul 01 00:12:00 GMT 2025
    - Last Modified: Thu Jun 19 11:50:12 GMT 2025
    - 173.5K bytes
    - Viewed (1)

  7. PetaLinux Build Guide for Ultra96 - 96Boards

    elf --fpga hardware/xilinx-ultra96-rev...
    www.96boards.org/documentation/consumer/ultra96... Cache
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    Registered: Mon Jun 30 02:20:06 GMT 2025
    - Last Modified: Thu Jun 19 11:50:03 GMT 2025
    - 21.8K bytes
    - Viewed (1)

  8. PetaLinux Build Guide for Ultra96-V2 - 96Boards

    elf --fpga hardware/xilinx-ultra96-rev...
    www.96boards.org/documentation/consumer/ultra96... Cache
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    Registered: Mon Jun 30 02:23:39 GMT 2025
    - Last Modified: Thu Jun 19 11:50:04 GMT 2025
    - 21.8K bytes
    - Viewed (0)

  9. SAN19 Linaro Connect - Community Day - 96Boards

    Hardware DragonBoard 410c Shiratech FPGA Mezzanine First Prize: 96Boards...
    www.96boards.org/go/san19-community/ Cache
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    Registered: Mon Jun 30 03:21:37 GMT 2025
    - Last Modified: Thu Jun 19 11:50:09 GMT 2025
    - 16.9K bytes
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  10. Compare 96Boards - 96Boards

    V SoC FPGA Dual ARM Cortex-A9 110K Logic Elements FPGA fabric...Shiratech FPGA Mezzanine Details - - - - Intel MAX-10 FPGA - - -...
    www.96boards.org/products/compare/ Cache
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    Registered: Tue Jul 01 00:14:34 GMT 2025
    - Last Modified: Thu Jun 19 11:50:11 GMT 2025
    - 644.4K bytes
    - Viewed (2)
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